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| www.fairchildsemi.com Application Note 53 Implementing an RC5051 DC-DC Converter on Pentium(R) II Motherboards Introduction This document describes how to implement a switching voltage regulator using an RC5051 high speed controller, a power inductor, a Schottky diode, appropriate capacitors, and external power MOSFETs. This regulator forms a step down DC-DC converter that can deliver up to 14.5A of continuous load current at voltages ranging from 1.3V to 3.5V. A specific application circuit, design considerations, component selection, PCB layout guidelines, and performance evaluations are covered in detail. In the past 10 years, microprocessors have evolved at such a rate that a modern chip can rival the computing power of a mainframe computer. Such evolution has been possible because of the increasing numbers of transistors that processors integrate. Pentium CPUs, for example, integrate well over 5 million transistors on a single piece of silicon. To integrate so many transistors on a piece of silicon, their physical geometry has been reduced to the sub-micron level. As a result of each geometry reduction, the corresponding operational voltage for each transistor has also been reduced. This changing CPU voltage demands the design of a programmable power supply-a design that is not completely re-engineered with every change in CPU voltage. The voltage range of the CPU has shown a downwards trend for the past 5 years: from 3.3V for the Pentium, to 3.1V for the Pentium Pro, to 2.8V for the Klamath, and to 2.0V for the Deschutes processors. With this trend in mind, Fairchild Semiconductor has designed the RC5051 controller. This controller integrates the necessary programmability to address the changing power supply requirements of lower voltage CPUs. Previous generations of DC-DC converter controllers were designed with fixed output voltages adjustable only by means of a set of external resistors. In a high volume production environment (such as with personal computers), however, a CPU voltage change would require a CPU board redesign to accommodate the new voltage requirement. The 5-bit DAC in the RC5051 reads the voltage ID code that is programmed into modern processors and provides the appropriate CPU voltage. In this manner, the PC board does not have to be re-designed each time the CPU voltage changes. The CPU can thus automatically configure its own required supply voltage. Intel Pentium II Processor Power Requirements Refer to Intel's AP-587 Application Note, Slot 1 Processor Power Distribution Guidelines, May 1997 (order number 243332-001), as a basic reference. Input Voltages Available inputs are +12V 5% and +5V 5%. Either one or both of these inputs can be used by the DC-DC converter. The input voltage requirements for Fairchild's RC5051 DCDC converter are listed in Table 1. See below for detailed information on how to apply these. Table 1. Input Voltage Requirements Part # RC5051 Vcc for IC +5V 5% MOSFET Drain +5V 5% or 12V 5% Pentium II DC Power Requirements Refer to Table 2, Intel Pentium II Processor Power Specifications. For standard motherboard designs , the on-board DC-DC converter must supply a minimum of 14.2A at 2.8V for Klamath or 2.0V for Deschutes. For a Deschutes Flexible Motherboard design, the on-board DC-DC converter must supply 18.9A. DC Voltage Regulation As indicated in Table 2, the voltage level supplied to the CPU must be within 3% of its nominal setting. Voltage regulation limits must include: * * * * Output load ranges specified in Table 2 Output ripple/noise DC output initial voltage set point Temperature and warm up drift (Ambient +0C to +70C at full load with a maximum rate of change of 5C per 10 minutes but no more than 10C per hour) * Output load transient with: * Slew rate >30A/ms at converter pins Range: 0.3A - ICCP Max (as defined in Table 2). Pentium is a registered trademark of Intel Corporation. Rev. 1.0.0 AN53 APPLICATION NOTE Table 2. Intel Pentium II(R) Processor Power Specifications CPU Model, Features Klamath 233MHz 266MHz 300MHz Deschutes 266MHz 300MHz 333MHz 350MHz 400MHz 450MHz 500MHz Deschutes Flexible Motherboard NOTES: 1. Maximum power values are measured at typical VCCP to take into account the thermal time constant of the CPU package. Voltage Specification, VCC CORE (VDC) 2.8V +100mV/-60mV Maximum Current, ICC CORE (A) 11.8 12.7 14.2 2.0V +100mV/-60mV 2.0V +100mV/-60mV 2.0V +100mV/-60mV 2.0V +/-60mV 2.0V +/-60mV 2.0V +/-60mV 2.0V +/-60mV 2.0V +/-60mV 8.5 9.6 10.6 11.1 12.1 14.2 16.0 18.9 2. Flexible motherboard specifications are recommendations only. Actual specifications are subject to change. Output Ripple and Noise Ripple and noise are defined as periodic or random signals over the frequency band of 0-20MHz at the output pins. Output ripple and noise must be consistent with voltage requirements throughout the full load range and under all specified input voltage conditions. Table 3. Output Voltage Programming Codes (continued) VID4 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 VOUT to CPU 0 1.65V 1 1.70V 0 1.75V 1 1.80V 0 1.85V 1 1.90V 0 1.95V 1 2.00V 0 2.05V 1 No CPU 0 2.1V 1 2.2V 0 2.3V 1 2.4V 0 2.5V 1 2.6V 0 2.7V 1 2.8V 0 2.9V 1 3.0V 0 3.1V 1 3.2V 0 3.3V 1 3.4V 0 3.5V Efficiency The efficiency of the DC-DC converter must be greater than 80% at maximum output current and greater than 40% at low current draw. Processor Voltage Identification There are five Voltage Identification Pins, VID4-VID0, on the Pentium II processor package which can be used to support automatic selection of the power supply voltage. These pins are internally unconnected or are shorted to ground (VSS ). The logic status of the VID pins defines the voltage required by the processor. In order to address future low voltage microprocessors, the RC5051 includes a VID4 input bit to extend the output voltage range as low as 1.3V. The output voltage programming codes are presented in Table 3. A `1' refers to an open pin and a `0' refers to a short to ground. Table 3. Output Voltage Programming Codes VID4 0 0 0 0 0 0 0 2 VID3 1 1 1 1 1 1 1 VID2 1 1 1 1 0 0 0 VID1 1 1 0 0 1 1 0 VID0 VOUT to CPU 1 1.30V 0 1.35V 1 1.40V 0 1.45V 1 1.50V 0 1.55V 1 1.60V Note: 1. 0 = processor pin is tied to GND 1 = processor pin is open. APPLICATION NOTE AN53 I/O Controls In addition to the Voltage Identification, there are several signals that control the DC-DC converter or provide feedback from the DC-DC converter to the CPU. They are Power-Good (PWRGD), and Output Enable (OUTEN). These signals will be discussed later. The RC5051 Controller The RC5051 is a programmable synchronous DC-DC controller IC. When designed around the appropriate external components, this device can be configured to deliver more than 14.5A of output current. The RC5051 utilizes both current-mode and voltage-mode PWM control to create an integrated step-down voltage regulator. RC5051 Description Simple Step-Down Converter S1 L1 + VIN D1 C1 RL Vout - 65-AP53-03 Main Control Loop Refer to the RC5051 Block Diagram illustrated in Figure 2. The control loop of the regulator contains two main sections: the analog control block and the digital control block. The analog section consists of signal conditioning amplifiers feeding into a set of comparators which provide the inputs to the digital control block. The signal conditioning section accepts inputs from the IFB (current feedback) and VFB (voltage feedback) pins and sets up two controlling signal paths. The voltage control path amplifies the difference between the VFB signal and the voltage reference and presents the output to one of the summing amplifier inputs. The current control path takes the difference between the IFB and VFB pins and presents the resulting signal to another input of the summing amplifier. These two signals are then summed together with the slope compensation input from the oscillator. This output is then presented to a comparator, which provides the main PWM control signal to the digital control block. The additional comparators in the analog control section set the point at which the current limit comparator disables the output drive signals to the external power MOSFETs. The digital control block takes the comparator inputs and the main clock signal from the oscillator to provide the appropriate pulses to the HIDRV and LODRV output pins. These pins control the external power MOSFETs. The digital section utilizes high speed Schottky transistor logic, allowing the RC5051 to operate at clock speeds as high as 1MHz. Figure 1. Simple Buck DC-DC Converter For the purpose of understanding a buck converter, Figure 1 illustrates a step-down DC-DC converter with no feedback control. The operation of the basic step-down converter is the basis for the design equations for the RC5051. Referring to Figure 1, the basic operation begins by closing the switch S1. When S1 is closed, the input voltage VIN is applied to inductor L1. The current flowing in this inductor increases, and the increase is given by the following equation: ( V IN - V OUT )T ON DI L = ---------------------------------------------L1 where TON is the time S1 is closed (the duty cycle is TON / TS, with TS the switching period). When S1 opens, the diode D1 conducts the inductor current and the output current is delivered to the load; the inductor current decrease is given by: V OUT ( T S - T ON ) DI L = -----------------------------------------L1 where (TS - TON ) is the time during which S1 is open. By solving these two equations, we can arrive at the basic relationship for the output voltage of a step-down converter: T ON V OUT = V IN ---------TS High Current Output Drivers The RC5051 contains two identical high current output drivers that utilize high speed bipolar transistors in a pushpull configuration. Each driver is capable of delivering 1A of current in less than 100ns. Each driver's power and ground are separated from the chip's power and ground for additional switching noise immunity. In order to obtain a more accurate approximation for VOUT , we must also include the forward voltage VD across diode D1 and the voltage across the switch , VSW . After taking into account these factors, the new relationship becomes: T ON V OUT = ( V IN + V D - V SW ) ---------- - V D TS where VSW = is the voltage across the MOSFET in the on state, I L * R DS,ON. 3 AN53 APPLICATION NOTE +12V RC5051 1 - + +5V 5 4 OSC - + 13 12 - + - + DIGITAL CONTROL +5V 7 9 VO VREF 16 5-BIT DAC 20 19 18 17 8 1.24V REFERENCE POWER GOOD 2 3 PWRGD 65-5051-01 VID0 VID2 VID4 VID1 VID3 ENABLE Figure 2. RC5051 Block Diagram The HIDRV driver has a power supply, VCCQP, supplied from a 12V source as illustrated in Figure 2. The resulting voltage is sufficient to provide the gate to source voltage to the external MOSFET that is required to achieve a low R DS,ON . Since the low side synchronous FET is referenced to ground, there is no need to boost the gate drive voltage, and its VCCP power pin can be tied to VCC. Output Enable (OUTEN) The DC-DC converter accepts an open collector signal for controlling the output voltage. The low state disables the output voltage. When disabled, the PWRGD output is in the low state. Over-Voltage Protection The RC5051 constantly monitors the output voltage for protection against over voltage conditions. If the voltage at the VFB pin exceeds 20% of the selected program voltage, an over-voltage condition is assumed and the chip disables the output drive signal to the external MOSFETs. Internal Voltage Reference The reference included in the RC5051 is a precision bandgap voltage reference. The internal resistors are precisely trimmed to provide a near zero temperature coefficient (TC). Added to the reference input is the resulting output from an integrated 5-bit DAC-provided in accordance with the Pentium II specification guidelines. These guidelines require the DC-DC converter output to be directly programmable via a 5-bit voltage identification (VID) code. This code scales the reference voltage from 2.0V (no CPU) to 3.5V in 100mV increments, and between 1.3V and 2.05V in 50mV increments. For guaranteed stable operation under all operating conditions, 0.1mF of decoupling capacitance should be connected to the VREF pin. No load should be imposed on this pin. Over-current Protection A current sense methodology is implemented to disable the output drive signal to the MOSFETs when an over-current condition is detected. The voltage drop created by the output current flowing across a sense resistor is presented to an internal comparator. When the voltage developed across the sense resistor exceeds the comparator threshold voltage, the chip reduces the output drive signal to the MOSFETs. The DC-DC converter returns to normal operation after the fault has been removed, for either an over-voltage or an overcurrent condition. Power Good (PWRGD) The RC5051 Power Good function is designed in accordance with the Pentium II DC-DC converter specification to provide a constant voltage monitor on the VFB pin. The circuit compares the VFB signal to the VREF voltage and outputs an active-low interrupt signal to the CPU when the power supply voltage differs more than 12% from nominal. The Power Good flag provides no other control function to the RC5051. 4 Oscillator The RC5051 oscillator section uses a fixed current capacitor charging configuration. An external capacitor (C EXT ) is used to preset the oscillator frequency between 80KHz and 1MHz. This scheme allows maximum flexibility in choosing external components. APPLICATION NOTE AN53 In general, a higher operating frequency decreases the peak ripple current flowing in the output inductor, thus allowing the use of a smaller inductor value. operation at higher frequencies also decreases the amount of energy storage that must be provided by the bulk output capacitors during load transients. Unfortunately, the efficiency losses due to switching of the MOSFETs increase as the operating frequency is increased. Thus, efficiency is optimized at lower operating frequencies. An operating frequency of 300 kHz was chosen in this Application Note to optimize efficiency while maintaining excellent regulation and transient performance under all operating conditions. Design Considerations and Component Selection Figure 3 illustrates a synchronous application using the RC5051. +12V L1 +5V C1 0.1mF 2.5mH CIN* C2 0.1mF R1 471/2 D1 1N4735A C6 0.1mF C5 1mF R2 Q1 4.71/2 R3 Q2 4.71/2 L2 2.3H D2 1N5820 R SENSE* VO COUT* VREF C3 0.1mF 11 10 9 12 8 13 7 14 15 6 RC5051 16 5 17 4 18 3 19 2 20 1 CEXT 100pF C4 1mF VID4 VID3 VID2 VID1 VID0 C8 0.1mF ENABLE C7 0.1mF R4 10K1/2 PWRGD VCC *Refer to Table 3 for values of RSENSE, COUT, and CIN. 65-5051-03 Figure 3. Synchronous DC-DC Converter Application Schematic Using the RC5051 5 AN53 APPLICATION NOTE Table 4. RC5051 Application Bill of Materials for Intel Pentium II Processors Reference C1-3, C6-8 C4-5 Cext CIN COUT D1 D2 L1 L2 Q1-2 R1 R2-3 RSENSE U1 Fairchild RC10-XX Fairchild RC5051M Elytone YT-6542 Fairchild FDP6030L or FDB6030L Sanyo 10MV1200GX Sanyo 6MV1500GX Motorola 1N4735A Motorola IN5820 Manufacturer's Part # Quantity 6 2 1 * * 1 1 1 1 2 1 2 1 1 Description 100nF, 50V Capacitor 1mF 16V Capacitor 100pF Capacitor 1200mF, 10V electrolytic 1500mF, 6.3V electrolytic 6.2V Zener Diode 3A Schottky Diode 2.5mH Inductor 1.3mH Inductor N-channel MOSFET 47W 4.7W CuNi Alloy Wire Resistor DC/DC Controller DCR < 6mW1 DCR < 3mW RDS, ON = 20mW @ VGS = 4.5V2 1/10W 1/10W *See Table 5 5%, C0G IRMS = 2A *See Table 5 ESR < 44mW *See Table 5 5% Requirements/Comments Notes: 1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. If used, it must be sized to avoid saturation at maximum input current. L1 may be omitted if desired. 2. For 14.2A designs using the FDP6030L MOSFETs, heatsinks with thermal resistance QSA <20C/W should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletin AB-8. Table 5. Recommended Values for CPU-based Applications Application 300MHz AMD K6 Motherboard Output Current 13A CIN 3 x 1200mF, 10V Sanyo 10MV1200GX 3 x 1200mF, 10V Sanyo 10MV1200GX 3 x 1200mF, 10V Sanyo 10MV1200GX COUT 7 x 1500mF, 6.3V Sanyo 6MV1500GX 7 x 1500mF, 6.3V Sanyo 6MV1500GX 7 x 1500mF, 6.3V Sanyo 6MV1500GX COUT Maximum ESR 6.1mW RSENSE 5.8mW 300MHz Intel Pentium II 14.2A Klamath Motherboard 300MHz Intel Pentium II 12.6A Deschutes Motherboard 6.8mW 5.2mW 5.3mW 5.8mW 6 APPLICATION NOTE AN53 MOSFET Selection Cosiderations MOSFET Selection This application requires N-channel Logic Level Enhancement Mode Field Effect Transistors. Desired characteristics are as follows: * Low Static Drain-Source On-Resistance, RDS,ON < 40 mW (lower is better) * Low gate drive voltage, VGS 4.5V * Power package with low Thermal Resistance * Drain current rating of 20A minimum * Drain-Source voltage > 15V. The on-resistance (RDS,ON ) is the primary parameter for MOSFET selection. It determines the power dissipation within the MOSFET and, therefore, significantly affects the efficiency of the DC-DC converter. Table 6 is a selection table for MOSFETs. Table 6. MOSFET Selection Table Manufacturer and Part # Fairchild FDP6030L Fairchild FDB6030L Fairchild FDP603AL Fairchild FDB603AL Fairchild FDP7030L Fairchild FDB7030L IR IRL2203N IR IRL2203S RDS, ON (mW) Conditions VGS = 4.5V, ID = 21A VGS = 4.5V, ID = 21A VGS = 4.5V, ID = 10A VGS = 4.5V, ID = 10A VGS = 5V, ID = 40A VGS = 5V, ID = 40A VGS = 4.5V, ID = 50A VGS = 4.5V, ID = 50A TJ = 25C TJ = 25C TJ = 25C TJ = 25C TJ = 25C TJ = 25C TJ = 25C TJ = 25C Typ. 15 15 30 30 9 9 Max. 20 20 36 36 10 10 10 10 Package TO-220 D2-PAK TO-220 D2-PAK TO-220 D2-PAK TO-220 D2-PAK0 Thermal Resistance (C/W) QJA = 62.5 QJA = 62.5 QJA = 62.5 QJA = 62.5 QJA = 62.5 QJA = 62.5 QJA = 62 QJA = 40 7 AN53 APPLICATION NOTE Two MOSFETs in parallel. +5V D1 Q1 HIDRV CP L2 PWM/PFM Control LODRV GNDP Q2 D2 65-5051-06 If output current is high, We recommend two MOSFETs used in parallel instead of one single MOSFET. The following significant advantages are realized using two MOSFETs in parallel: * Significant reduction of Power dissipation. Example: RC5051 with Maximum output current of 14A at 2.8V with one MOSFET on the high side: PMOSFET = (I2 RDS,ON)(Duty Cycle) = (14A)2 (0.050W)(2.8V / 5V) = 5.5W With two MOSFETs in parallel: PMOSFET = (I DS,ON )(Duty Cycle) = (14A/2)2 (0.037W) (2.8V / 5V) = 1.0W/FET *Note: RDS,ON increases with temperature. Assume RDS,ON = 25mW at 25C. RDS, ON can easily increase to 50mW at high temperature when using a single MOSFET. When using two MOSFETs in parallel, the temperature effects should not cause the RDS, ON to rise as much. 2R VCCQP RS VO COUT Figure 4. Charge Pump Configuration * Smaller heat sink required. With power dissipation down to around one watt, considerably less heat sink is required. * Reliability. With thermal management under control, this DC-DC converter is able to deliver load currents up to 14.5A with no performance or reliability concerns. * MOSFET Gate Bias. As already discussed, the low-side MOSFET on the RC5051 needs only 5V for its gate drive supply. The highside MOSFET can be biased by one of two methods: Charge Pump or 12V Gate Bias. * Method 1. Charge pump (or Bootstrap) method. Figure 4 displays the use of a charge pump to provide gate bias to the high-side MOSFET with the RC5051. Capacitor CP is the charge pump deployed to boost the voltage of the RC5051 output driver. When the MOSFET switches off, the source of the MOSFET is at approximately 0V. VCCQP is charged through the Schottky diode D1 to approximately 4.5V. Thus, the capacitor CP is charged to approximately 4.5V. When the MOSFET turns on, the source of the MOSFET voltage is equal to 5V. The capacitor voltage follows, and hence provides a voltage at VCCQP equal to approximately 10V. The Schottky diode D1 is required to provide the charge path when the MOSFET is off, and reverses bias when the VCCQP goes to 10V. The charge pump capacitor, CP, needs to be a high Q, high frequency capacitor. A 1mF ceramic capacitor is recommended here. * Method 2. 12V Gate Bias. Figure 5 illustrates how a 12V source can be used to bias the VCCQP. A 47W resistor is used to limit the transient current into the VCCQP pin and a 1mF capacitor filter is used to filter the VCCQP supply. This method provides a higher gate bias voltage (VGS ) to the MOSFET than the charge-pump method does, and therefore reduces the RDS, ON of the MOSFET and thus reduces the power loss due to the MOSFET. Figure 6 shows how RDS, ON reduces dramatically with VGS increases. A 6.2V Zener diode (D1) is placed from VCCQP to 5V to clamp the voltage at VCCQP to a maximum of 12V and ensure that the absolute maximum voltage of the IC will not be exceeded. +5V +12V 471/2 D1 VCCQP Q1 HIDRV 1F L2 PWM/PFM Control LODRV GNDP 65-5051-07 RS VO COUT Q2 D2 Figure 5. 12V Gate Bias Configuration Rds, on (W) IRL2203NS NDP6030L FDP7030L NDB603AL Figure 6. RDS,ON vs. VGS for Selected MOSFETs 8 APPLICATION NOTE AN53 Converter Efficiency Losses due to parasitic resistance in the switches, coil, and sense resistor dominate at high load-current level. The major loss mechanisms under heavy loads, in typical order of importance, are: * MOSFET I 2 R losses * Transition losses Formulae for Calculation of Converter Efficiency P OUT V OUT I OUT Efficiency = ------------- = ------------------------------------------------p IN V OUT I OUT + P LOSS * * * * * * Sense Resistor losses Input Capacitor losses Coil Losses Losses due to the operating supply current of the IC. Diode-conduction losses Gate-charge losses P LOSS = P RDS + ( P RISE + P FALL ) + P INDUCTOR + P SENSE + P GATE + P DIODE + P CAPS + P IC P RDS = I OUT R DS,ON DC for the high-side MOSFET P RDS = I OUT R DS,ON ( 1 - DC ) for the low-side MOSFET V IN I OUT t RISE F S V IN I OUT t FALL F S P RISE + P FALL = ----------------------------------------- + ------------------------------------------- for the high-side MOSFET 2 2 V f I OUT t RISE F S V f I OUT t FALL F S P RISE + P FALL = -------------------------------------- + ---------------------------------------- for the low-side MOSFET 2 2 P INDUCTOR = I OUT R INDUCTOR P SENSE = I OUT R SENSE P GATE = CV F S for each MOSFET P DIODE = I OUT V F T DT F S , with TDT the deadtime P CAPS = ESR I OUT DC ( 1 - DC ) P IC = 25mA* V CC Example Efficiency Calculation 2 2 2 2 2 2 As an example, the efficiency of a synchronous 14A converter based on the RC5051 will be calculated. The converter produces 2.8V output from a 5V input, switches at 300kHz, has MOSFETs with a 4nF gate capacitance, RDS,on = 10mW for both MOSFETS and a rise and fall time of 50nsec. The inductor has a winding resistance of 3mW, and the sense resistor used is 5.2mW. The schottky paralleled with the synchronous rectifier has a forward voltage of 400mV at 14A. The input capacitors have a total ESR of 15mW. P RDS = ( 14A ) 10mW = 1.96W 5V 14A ( 50nsec + 50nsec )300kHz P RISE + P FALL = ------------------------------------------------------------------------------------------ = 1.05W 2 400mV 14A ( 50nsec + 50nsec )300kHz P RISE + P FALL = ----------------------------------------------------------------------------------------------------- = 84mW 2 P INDUCTOR = ( 14A ) 3mW = 590mW P SENSE = ( 14A ) 5.2mW = 1.02W P GATE = 4nF ( 5V ) 300kHz 2 = 60mW P DIODE = 14A 400mV 50nsec 300kHz = 84mW P CAPS = 15mW ( 14A ) 0.56 ( 1 - 0.56 ) = 724mW P IC = 25mA 5V 125mW P LOSS = 1.96W + 1.05W + 0.084W + 0.59W + 1.02W + 0.06W + 0.084W + 0.724W + 0.125W = 5.70W 2.8V 14A Efficiency = --------------------------------------------------- = 87% 2.8V 14A + 5.70W 2 2 2 2 2 9 AN53 APPLICATION NOTE When using these formulae, special care must be taken regarding the MOSFETs' transition times: the rise and fall refer to the MOSFETs' drain-source voltage, NOT the gatesource. Using the datasheet values (rather than measured values) can also result in serious overestimation of the losses, since the transition is being driven by an inductive source, not a resistor. Selecting the Inductor The inductor is one of the most critical components to be selected for a DC-DC converter application. The critical parameters of the inductor are its inductance (L), maximum DC current (IO ), and DC coil resistance (Rl ). When designing the external current sense circuitry, pay careful attention to the output limitations during normal operation and during a fault condition. If the over-current protection threshold current is set too low, the DC-DC converter may not be able to continuously deliver the maximum CPU load current. If the threshold level is too high, the output driver may not be disabled at a safe limit and the resulting power dissipation within the MOSFETs may rise to destructive levels. The following is the design equation used to set the over-current threshold limit: I RIPPLE I PK = I LOAD, MAX + -----------------2 The inductor's inductance helps determine two key parameters of a converter, its ripple current and its transient response. On the one hand, making the inductance large reduces the ripple current, and thus the output ripple voltage. On the other hand, a large inductance provides a slow response to load transients. For Pentium II supplies, the transient response is paramount, and thus the inductance is typically chosen to be in the 1-5mH range. Most inductors' inductance also depends on current, that is, increasing the current through the inductor decreases the inductance. It is thus vital to specify the DC current when procuring an inductor. The one type of inductor which does not change inductance with current is the rod-core inductor, but this type may have significant EMI (noise) problems. For further information, refer to Applications Bulletin AB-12. The resistance of the winding of the inductor is also important, as it is directly responsible for much of the losses in the inductor. Minimizing the resistance will help improve the converter's efficiency. Where I pk is defined as in Figure 7, and Iload, max = maximum output load current. Figure 7 illustrates the inductor current waveform for the RC5051 DC-DC converter at maximum load. IPK I IMIN TON Ts 65-AP53-04 ILOAD, MAX TOFF t Figure 7. Typical DC-DC Converter Inductor Current Waveform The calculation of the ripple current is as follows: V IN - V OUT V OUT I RIPPLE -T ------------------ = ----------------------------- S -------------2L V IN 2 where: VIN = input voltage to converter, TS = the switching period of the converter = 1/fS, and fS = switching frequency. As an example, for an input voltage of 5V, output voltage of 2.8V @ 14A, L equal to 1.3mH and a switching frequency of 285KHz (using CEXT = 100pF), the peak inductor current can be calculated as : 5V - 2.8V 1 2.8V I PK = 14A + ------------------------- ------------------- ----------- = 15.7A 2 1.3mH 285kHz 5V Implementing Over-current Protection Intel currently requires all power supply manufacturers to provide continuous protection against short circuit conditions that may damage the CPU. To address this requirement, Fairchild Semiconductor has implemented a current sense methodology to limit the power delivered to the load in the event of over-current. The voltage drop created by the output current across a sense resistor is presented to one terminal of an internal comparator with hysteresis. The other comparator terminal has the threshold voltage, nominally of 120mV. Table 7 states the limits for the comparator threshold of the Switching Regulator. Table 7. RC5051 Over-current Comparator Threshold Voltage Short Circuit Comparator Vthreshold (mV) Typical Minimum Maximum 10 120 100 140 Therefore, the over-current detection threshold must be at least 16A. The next step is to determine the value of the sense resistor. Including sense resistor tolerance, the sense resistor value can be determined as V th,min R SENSE = ----------------------------I SC ( 1 + TF ) Where TF = Tolerance Factor for the sense resistor. Table 8 describes tolerance, size, power capability, temperature coefficient and cost of various type of sense resistors. AN53 APPLICATION NOTE Table 8. Comparison of Sense Resistors Discrete Iron Alloy Resistor (IRC) 5% (1% available) 0.45" x 0.065" x 0.200" 1 watt (3W and 5W available) +390 ppm $0.31 Discrete Metal Strip Surface Mount Resistor (Dale) 1% 0.25" x 0.125" x 0.025" 1 watt (2W available) 75 ppm $0.47 Discrete MnCu Alloy Wire Resistor 10% 0.200" x 0.04" x 0.160" >1 watt Discrete CuNi Alloy Wire Resistor (Copel) 10% 0.200" x 0.04" x 0.100" >1 watt Description Tolerance Factor (TF) Size (L x W x H) Power capability Motherboard Trace Resistor 20% 2" x 0.2" x 0.001" (1 oz Cu trace) >50A/in Temperature Coefficient Cost @10,000 piece +3900 ppm Low---included in motherboard 50 ppm $0.09 20 ppm $0.09 Continuing with the example, based on the Tolerance Factor in the above table, for an embedded PC trace resistor and for ISC set 1A greater than Ipk: 100mV R SENSE = ---------------------------------------------------------- = 5.0mW ( 15.7A + 1A ) ( 1 + 0.20 ) Comment on Discrete Sense Resistors Discrete Iron Alloy resistors come in a variety of tolerances and power ratings, and are ideal for precision implementation, minimizing stress on the MOSFETs. MnCu Alloy wire resistors or CuNi Alloy wire resistors are ideal for low cost implementations. Designing an Embedded Sense Resistor (PC Trace Resistor) For a discrete Cuni resistor: 100mV R SENSE = ---------------------------------------------------------- = 5.7mW ( 15.7A + 1A ) ( 1 + 0.10 ) For user convenience, Table 9 lists the recommended values for sense resistors for various load currents using embedded trace resistors and discrete resistors and assuming (Ipk- Imin) / 2 = 10% IOUT and ISC set 1A greater than Ipk Table 9. Rsense for Various Load Currents ILoad,max (A) RSENSE PC Trace Resistor (mW) RSENSE Discrete Resistor (mW) 6.9 7.8 8.5 8.7 9.6 10.6 11.1 12.6 14.2 17.2 18.5 18.9 9.7 8.7 8.1 7.9 7.2 6.6 6.3 5.6 5.0 4.2 3.9 3.8 10.6 9.5 8.8 8.6 7.9 7.2 6.9 6.1 5.5 4.6 4.3 4.2 Embedded PC trace resistors have the advantage of near zero cost implementation. However, the value of the PC trace resistance has large variations. To start with, traces on the outside layers have far more variation than those on inside layers; for this reason, embedded resistors should always be designed on inside layers. Embedded resistors have 3 error sources: the sheet resistivity of the layer, the tolerance of the width and length of the trace, and the temperature variation of the copper. Only two of the error sources must be considered for laying out embedded sense resistors. * Sheet resistivity. For 1 ounce copper, the thickness is nominally 1.3mils, and the toleranace is typically .1 mil. Therefore error due to sheet resistivity is 0.1 mil / 1.3mil = +/-8% * Tolerance of width and length. The width and length of traces also have tolerances; typical numbers might be 3/4 mil. A typical width to obtain a 5.2mW resistor might be 300mils, and so the length would have to be: twR 1.3mil 300mil 5.2mW L = --------------------- = --------------------------------------------------------------- = 2996mils -4 r 6.77 10 W - mil or 3 inches. The tolerance is thus negligible. 11 AN53 APPLICATION NOTE * Thermal Consideration. Due to I2R power losses the temperature of the resistor will increase, leading to a higher resistance value. In addition, ambient temperature variation will add to the change in resistor value: R = R 20C 1.00393 T - 20 Refer to Figure 8. 1 Each W = 300 mils L = 3000mils 65-AP53-05 where: R20C is the resistance at 20C, T is the trace's temperature, and R is the actual resistance. For example, for temperature T = 50C, the %R change = 12%. Table 10 is the summary of the tolerance for the Embedded PC Trace Resistor. Figure 8. 5.20mW Sense Resistor (10 s) Table 10. Summary PC Trace Resistor Tolerance Tolerance due to Sheet Resistivity variation Tolerance due to temperature variation Total Tolerance for PC Trace Resistor Design Rules for Using an Embedded Resistor You can also implement the sense resistor in the following manner. Each corner square is counted as 0.6 square since current flowing through the corner square does not flow uniformly and it is concentrated towards the inside edge, as shown in Figure 9. 1 Each 8% 12% .6 .6 .8 20% 65-AP53-06 Figure 9. 5.30mW Sense Resistor (10 s) A Design Example Combining an Embedded Resistor and a Discrete Resistor The basic equation for the resistance of an embedded resistor is: L R = r -----------Wt where: r = Resistivity(mW-mil), L = Length(mils), W = Width(mils), and t = Thickness(mils). For 1oz copper, t = 1.3 mils, r = 677mW-mil, 1 L/1 W = 1 Square ( s ). For example, you can layout a 5.20mW embedded sense resistor using the example above L/W = 300mils RWt 0.0052 300 1.3 L = ----------- = -------------------------------------------- = 3000mils r 677 For low cost implementation, the embedded PC trace resistor is most desirable. However, its wide tolerance (20%) can present a problem. In addition, requirements for the CPU change frequently, and, thus, the maximum load current may be subject to change. Combining embedded resistors with discrete resistors may be a desirable option. Figure 10 shows a design that provides flexibility with a solution to address wide tolerances. In this design, you have the option to choose an embedded or a discrete sense resistor. To use the discrete sense resistor, populate R21 with a shorting bar (zero Ohm resistor) for proper Kelvin connection and add the MnCu sense resistor. To use the embedded sense resistor, on the other hand, populate R22 with a shorting bar for Kelvin connection. The embedded sense resistor allows the user to choose a plus or a minus delta resistance tap to offset any large sheet resistivity change. In this design, the center tap yields 6mW, the left tap yields 6.8mW, and the right tap yields 5.3mW. L/W = 10 s IFB MnCu Discrete VFB Resistor R21 R22 Output Power Plane (Vout) R-Dr R R+Dr 65-AP53-07 Figure 10. Short Circuit Sense Resistor Design Using a PC Trace Resistor and an Optional Discrete Sense Resistor 12 APPLICATION NOTE AN53 RC5051 over-current Characteristics The RC5051 over-current characteristic includes a hysteresis function that prevents the DC-DC converter from oscillating in the event of an over-current. Figure 11 shows the typical characteristic of the DC-DC converter circuit with a 6mW sense resistor. The converter exhibits a normal load regulation characteristic until the voltage across the resistor exceeds the internal over-current threshold of 120mV. At this point, the internal comparator trips and signals the controller to reduce the duty cycle of the high-side MOSFET. This causes a drastic reduction in output voltage as the load regulation collapses into the over-current control mode. The output voltage does not return to its nominal value until the output current is reduced to a value within the safe range for the DC-DC converter. Output Voltage vs. Output Current RSENSE = 6m1/2 3.5 3.0 2.5 These calculations show that the high-side MOSFET is not being over-stressed during an over-current condition. OUT (V) Figure 12A. HIDRV Output Waveform for Normal Operation Condition with Vout = 2.8V@10A 2.0 1.5 65-5051-08 1.0 0.5 0 0 5 10 15 20 25 Output Current (A) Figure 11. RC5051 Over-current Characteristic Power Dissipation Consideration During an Over-current Condition The RC5051 controller responds to an output over-current by drastically reducing the duty cycle of the gate drive signal to the high-side MOSFET. In doing this, the high-side MOSFET is protected from stress and from eventual failure. Figure 12A shows the gate drive signal of a typical RC5051 operating in continuous mode with a load current of 10A. The duty cycle is set by the ratio of the input voltage to the output voltage. If the input voltage is 5V, and the output voltage is 2.8V, the ratio of Vout/ Vin is 56% (64% measured). Figure 12B shows the result of a RC5051 going into its overcurrent mode with a duty cycle of approximately 47%. Calculating the power in each MOSFET at each condition on the graph (Figure 11) shows how the protection works. The power dissipated in the high-side MOSFET at normal operation for a load current of 14.2A, is given by: PD Figure 12B. HIDRV Output Waveform for Over-current Condition Power dissipation in the low-side MOSFET during an overcurrent condition must also be considered. The low-side MOSFET dissipates power while the high-side MOSFET is off. The power dissipated in the low-side MOSFET during normal operation, is given by: = I R RDS, ON ( 1 - DC ) = ( 14.2 ) .01 2 2 .36 = 0.73 = I R DS, ON DC = ( 14.2 ) .01 2 2 .64 = 1.29W During an over-current , the duty cycle reduces to around 47%. The power dissipated in the low-side MOSFET during short circuit condition, is given by: P D = ( 20 ) .01 .53 = 2.1W 2 ignoring switching losses. The power dissipated in the MOSFET at an over-current condition of 20A, is given by: P D = ( 20 ) .01 .47 = 1.88W 2 again ignoring switching losses. Thus, for the low-side MOSFET, the thermal dissipation during over-current is greatly magnified. This requires that the thermal dissipation of the low-side MOSFET be properly managed by an appropriate heat sink. To protect the low-side MOSFET from being destroyed in the event of an over-cur13 AN53 APPLICATION NOTE rent , you should limit the junction temperature to less than 130C. You can find the required thermal resistance using the equation for maximum junction temperature: T J ( max ) - T A P D = ------------------------------R QJA the total ESR of the capacitors used and the parasitic resistance of the output traces. For a detailed analysis of capacitor requirements in a high-end microprocessor system, please refer to Application Bulletin 14. Input Filter The DC-DC converter may include an input inductor between the system +5V supply and the converter input as described below. This inductor serves to isolate the +5V supply from the noise in the switching portion of the DC-DC converter, and to limit the inrush current into the input capacitors during power up. A value of 2.5mH is typical, as illustrated in Figure 13; details on selection of an input inductor may be found in Applications Bulletin AB-16. The number of input capacitors required for a converter is determined by the capacitors' ripple current rating. The ripple current is given by: I rms = I OUT DC - DC 2 Assuming that the ambient temperature is 50C, T J ( max ) - T A 130 - 50 R QJA = ------------------------------- = -------------------- = 38C W PD 2.1 Thus, you need to provide a heat sink that gives the low-side MOSFET a thermal resistance of 38C/W or lower to protect the device during an indefinite short. In summary, with proper heat sink, the low-side MOSFET is not over-stressed during an over-current condition. Schottky Diode Selection The application circuit diagram of Figure 3 shows a Schottky diode, D2. D2 is used as a flyback diode to provide a current path for the inductor current during the dead-time when both the high-side and low-side MOSFETs are briefly both turned off. Table 11 shows the characteristics of several Schottky diodes. Note that MBRB2515L has a very low forward voltage drop even at high current. Although it is not necessary to use a high-current diode for this application, selecting a higher current schottky will provide improved efficiency at slightly higher cost. Thus, for example, a Deschutes processor running at 2.0V out from 5.0V in has a DC = 2.0/5.0 = .4; if it pulls 14.2A, its Irms = 7A. Table 12 shows some typical input capacitors' current ratings; the current rating increases as temperature decreases. Although exceeding these ratings will not cause capacitor damage, it will reduce their life, and thus the converter's MTBF. 5V 0.1F Vin 1000F, 10V Electrolytic Table 11. Schottky Diode Selection Table Manufacturer Model # Motorola 1N5817 Motorola 1N5820 Conditions IF = 1A; Tj = 25C IF = 3A; Tj = 25C Forward Voltage VF <.45v <.475v < 0.58v < 0.48v < 0.28v 65-5051-09 Motorola IF = 20A; Tj = 25C MBR2015CTL IF = 20A;Tj = 150C Motorola IF = 19A; Tj = 70C MBRB2515L Figure 13. Typical Input Filter Table 12. Input Capacitor Selection Guide Manufacturer Sanyo United Chemicon Panasonic Part # 10MV1200GX LXZ10VB122M10X20 EEUFA10122 Irms 2.0A @ 65C 1.2A @ 105C 1.2A @ 105C Output Filter Capacitors Correct calculation of the output capacitance is crucial to the performance of the DC-DC converter. The output capacitor determines the overall loop stability, output voltage ripple, and, most importantly, load transient response. Because the control loop response of the controller is not instantaneous, the initial load transient must be supplied entirely by the output capacitors. The initial voltage deviation is determined by 14 AN53 APPLICATION NOTE Q1 Q2 Good layout 11 12 13 14 15 16 17 18 19 20 RC505 10 9 8 7 6 5 4 3 2 1 Problem layout = "Quiet" Pins Q2 Q1 65-AP53-08 Figure 14. Placement of the MOSFETs PCB Layout Guidelines and Considerations PCB Layout Guidelines * Placement of the MOSFETs relative to the RC5051 is critical. Place the MOSFETs (Q1 & Q2) so that the trace length from the RC5051 HIDRV and LODRV pins to the FET gates is minimized. A long lead length on this pin would cause high amounts of ringing due to the inductance of the trace and the large gate capacitance of the FET. This noise radiates all throughout the board, and, because it is switching at such a high voltage and frequency, it is very difficult to suppress. Figure 14 shows an example of good placement for the MOSFETs in relation to the RC5051. In addition, this figure shows an example of problematic placement for the MOSFETs. In general, all of the noisy switching lines should be kept away from the quiet analog section of the RC5051. That is, traces that connect to pins 9, 12 and 13 (LODRV, HIDRV and VCCQP) should be kept far away from the traces that connect to pins 1, 2, 4 and 5, and pin 16. * Place the 0.1mF decoupling capacitors as close to the RC5051 pins as possible. Extra lead length degrades their ability to suppress noise. * Each VCC and GND pin should have its own via to the appropriate plane. This helps to provide isolation between pins. * Surround the CEXT timing capacitor with a ground trace. Be sure to place a ground or power plane under the capacitor for further noise isolation to provide additional shielding to the oscillator pin 1 from the noise on the PCB. In addition, place this capacitor as close to the RC5051 pin 1 as possible. * Place the MOSFETs, inductor and Schottky as close together as possible for the same reasons as on the first bullet above. Place the input bulk capacitors as close to the drains of MOSFETs as possible. In addition, placement of a 0.1mF decoupling capacitor right on the drain of each MOSFET helps to suppress some of the high frequency switching noise on the input of the DC-DC converter. * Place the output bulk capacitors as close to the CPU as possible to optimize their ability to supply instantaneous current to the load in the event of a current transient. Additional space between the output capacitors and the CPU allows the parasitic resistance of the board traces to degrade the DC-DC converter's performance under load transient conditions, causing higher voltage deviation. For more detailed information regarding capacitor placement, refer to Application Bulletin AB-5. * The traces that run from the RC5051 IFB (pin 4) and VFB (pin 5) pins should be run next to each other and Kelvin connected to the sense resistor. Running these lines together prevents some of the common mode noise that is presented to the RC5051 feedback input. Try, as much as possible, to run the noisy switching signals (LODRV, HIDRV & VCCQP) on one layer, but use the inner layers for power and ground only. If the top layer is being used to route all of the noisy switching signals, use the bottom layer to route the analog sensing signals VFB and IFB. 15 AN53 APPLICATION NOTE Example of a PC Motherboard Layout and Gerber File. This section shows a reference design for motherboard implementation of the RC5051 along with the Layout Gerber File and Silk Screen. The actual PCAD Gerber File can be obtained from Fairchild Semiconductor local Sales Office . 7. 8. Next check the oscillator pin. You should see a saw tooth wave at the frequency set by the external capacitor. When the VREF and CEXT pins are checked and correct and the output voltage is incorrect, look at the waveform at VCCQP. This pin should be +12V (in the +12V application), and should be swinging from slightly below +5V to about +10V (in the charge pump application). If the VCCQP pin is noisy, with ripples/ over-shoots riding on it this may make the converter function incorrectly. Next, look at HIDRV pin. This pin directly drives the gate of the high-side FET. It should provide a gate drive (measured gate to ground) of about 10V when turning the FET on. A careful study of the layout is recommended. Refer to the "PCB Layout Guidelines" section. Guidelines for Debugging and Performance Evaluations Debugging Your First Design Implementation 1. 2. Note the setting of the VID pins to know what voltage is to be expected. Do not connect any load to the circuit. While monitoring the output voltage, apply power to the circuit with current limiting at the power source. This ensures that no catastrophic shorts are present. If proper voltage is not achieved go to "Procedures" below. When you have proper voltage, increase the current limiting of the power source to 16A. Apply load in 1A increments. An active load (HP6060B or equivalent) is suggested. In case of poor regulation refer to "Procedures" below. 9. 3. 10. Past experience shows that the most frequent errors are incorrect components, improper connections, and poor layout. Performance Evaluation This section shows sample evaluation results as a reference guide for evaluating a DC-DC Converter using the RC5051 on a Pentium II motherboard. 4. 5. 6. DC Regulation VID(2.0V) 43210 2.0V 00001 Iload (A) 0.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 14.5 Load Regulation 0.5-14.5A Vout (V) 2.019 2.018 2.017 2.016 2.014 2.013 2.012 2.010 2.009 2.007 2.006 2.005 2.004 2.003 2.001 2.001 0.90% Procedures 1. If there is no voltage at the output and the circuit is not drawing current look for opens in the connections, check the circuitry versus schematic, and check the power supply pins of the RC5051 to make sure that voltage(s) are applied. If there is no voltage at the output and the circuit is drawing excessive current (>100mA) with no load, check for possible shorts. Determine the path of the excessive current and which device is drawing it-this current may be drawn by peripheral components. If the output voltage comes close to the expected value, check the VID inputs at the device pins. The part is factory set to respond properly to the VID inputs. Shut down at too low a current can be caused by an inappropriate value of the sense resistor. See the "Sense Resistor" section. Poor load regulation can be due to many causes. Check the voltages and signals at the critical pins. The VREF pin should be at the voltage set by the VID pins. If the power supply pins and the VID pins are correct the VREF should have the correct voltage. 2. 3. 4. 5. 6. 16 APPLICATION NOTE AN53 The DC output voltage is measured from minimum to maximum load current. Ideally, the RC5051 should show about 20mV droop between these two limits. Note that the measurement must be taken directly on the leads of the output capacitors, since there may otherwise be parasitic resistances causing additional droop. Output voltage load transients due to load current step Test Condition Measured Low to high Current Step (Vout = 2.00V) High to Low Current Step (Vout = 2.00V) 0.5A-14.5A 96mV Comment Limit = 130mV PASS Figure 15 Limit = 130mV PASS Figure 16 14.5A-0.5A 109mV Figure 16. High to Low Current Transiet Response The output voltage transient response to the worst-case step current load is measured using an Intel EMT tool. Again, the measurement must be taken directly on the leads of the output capacitors, since there may otherwise be parasitic resistances and inductances causing additional droop. Over-Current Limit Using an electronic load, the output current should be slowly increased until the converter hits over-current limit. Reaching this limit will be evident because the output voltage quickly drops out of regulation as the current is increased. Component Case Temperature Each of the major components should be measured for excessive temperature, which can be indicative of a problem. At the least, the RC5051, the MOSFETs and the schottky diode should all be measured. The converter should be run at its maximum load current until it reaches thermal stability, at least 20 minutes, before the temperature measurements are taken. Figure 15. Low to High Current Transiet Response 17 AN53 APPLICATION NOTE Notes 18 APPLICATION NOTE AN53 Notes 19 AN53 APPLICATION NOTE LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 7/21/98 0.0m 001 Stock#AN30000053 O 1998 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. |
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